Research Theme

Novel Computing and Beyond CMOS Hardware

Sensor Signal Processing

Aim

High-Performance Kernel Learning Processors for 6G Sensing: From Algorithmic Models to ASICs

Objectives

1. Develop analytical models that characterise the stability, convergence behaviour, and error performance of kernel-based online learning algorithms under the high-speed conditions expected in 6G sensing systems.
2. Design and optimise high-speed kernel learning algorithms that exploit sparsity, feature selection, and reduced model complexity to enable real-time sensor signal processing.
3. Create hardware-efficient architectures implementing the proposed algorithms, investigating trade-offs between throughput, energy consumption, silicon area, and learning accuracy for ASIC deployment.
4. Validate prototype ASICs, performing real-time testing using representative 6G sensing data to demonstrate end-to-end functionality and performance.

Description

This project will also be supervised by Prof George Goussetis.

This project investigates how kernel-based online learning can operate under the extreme data rates, tight latency, and dense sensing environments expected in 6G systems. Although well suited to continuously evolving sensor data, kernel online learning is fundamentally constrained by nonlinear parameter-update loops that become computational bottlenecks at 6G-class speeds. The core problem is the absence of analytical understanding and hardware-efficient formulations that explain these limits and indicate how they can be overcome.

The research will develop models that characterize stability, complexity, and error behaviour under realistic 6G operating conditions, revealing the constraints and sparsity structures that determine real-time feasibility. These insights will guide the exploration of algorithmic variants and architectural principles capable of supporting high-speed, low-energy kernel adaptation.

Validation will use representative 6G sensing workloads, establishing a clear pathway from problem characterization to hardware-ready design principles suitable for future ASIC implementations.

[1] M. Scarpiniti et al., “Nonlinear spline adaptive filtering,” Signal Process., vol. 93, no. 4, pp. 772–783, 2013.

[2] W. Liu et al., “The kernel least-mean-square algorithm,” IEEE Trans. Signal Process., vol. 56, no. 2, pp. 543–

554, 2008.

[3] W. D. Parreira et al., “Stochastic behavior analysis of the Gaussian kernel least-mean-square algorithm,” IEEE

Trans. Signal Process., vol. 60, no. 5, pp. 2208–2222, 2012.

[4] N. J. Fraser et al., “FPGA implementations of kernel normalised least mean squares processors,” ACM Trans.

[5] M. T. Khan and O. Gustafsson, “ASIC implementation trade-offs for high-speed LMS and block LMS adaptive

[6] M. T. Khan et al., “Optimal complexity architectures for pipelined distributed arithmetic-based LMS adaptive filter,” IEEE Trans. Circuits Syst. Regul. Pap., vol. 66, no. 2, pp. 630–642, 2018.

[7] M. T. Khan and O. Gustafsson, “Stochastic analysis of LMS algorithm with delayed block coefficient adaptation,”(arXiv:2306.00147)

[8] M. T. Khan and R. A. Shaik, "High-Throughput and Improved-Convergent Design of Pipelined Adaptive DFE for 5G Communication," in IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 68, no. 2, pp. 652-656, Feb. 2021

[9] M. T. Khan, H. E. Yantır, K. N. Salama and A. M. Eltawil, "Architectural Trade-Off Analysis for Accelerating LSTM Network Using Radix-r OBC Scheme," in IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 70, no. 1, pp. 266-279, Jan. 2023

[10] M. T. Khan and M. A. Alhartomi, "Digit-Serial DA-Based Fixed-Point RNNs: A Unified Approach for Enhancing Architectural Efficiency," in IEEE Transactions on Neural Networks and Learning Systems, vol. 36, no. 5, pp. 8240-8254, May 2025.

[11] Boyang Chen, M. T. Khan, et al., “COMET: Co-Optimization of a CNN Model using Efficient-Hardware OBC Techniques” (arXiv:2510.03516)

Minimum entry qualification - an Honours degree at 2:1 or above (or International equivalent) in a relevant science or engineering discipline, possibly supported by an MSc Degree. 

Further information on English language requirements for EU/Overseas applicants.

Home fee rate and stipend are available for this position.