Dr Shady Agwa Rizkalla

Shady Agwa is a Research Fellow at the Centre for Electronics Frontiers CEF, The University of Edinburgh (UK). He received his BSc and MSc degree from Assiut University (Egypt), both in Electrical Engineering. He got his PhD in Electronics Engineering from The American University in Cairo (Egypt) in 2018. Following his PhD, he joined the Computer Systems Laboratory at Cornell University (USA) as a Postdoctoral Associate for two years. In 2021, Shady joined the Centre for Electronics Frontiers at the University of Southampton (UK) as a Senior Research Fellow and then as a Research Fellow at the University of Edinburgh (UK). His research interests span across VLSI and Computer Architecture for AI using conventional and emerging technologies. His work focuses on AI-Specific Integrated Circuits \& Systems (AISICS) with extensive expertise in In-Memory Computing, Stochastic/Bitstream Computing, Systolic Arrays, Beyond Von Neumann Architectures, Memories, and Energy-Efficient Digital ASIC Design.

• PhD in Electronics Engineering, The American University in Cairo, Egypt.
• MSc in Computer Engineering, Assiut University, Egypt.
• BSc in Computer & Systems Engineering,  Assiut University, Egypt.

IEEE Member.

• 2024 - 2025, Digital System Design Course (3rd).
• 2023 - 2025, Digital Systems Lab Courses (4th & MSc).

My research focuses on novel AI Computing Architectures with extensive exploration of: In-Memory Computing (IMC), Stochastic Computing (SC), Spatial Dataflows & Systolic Arrays, Non-Binary Computing Domains, Beyond Von Neumann Architectures, Emerging Technologies, Memories, and Energy-Efficient Digital ASIC Design. My research philosophy adopts two themes: 1) AI Computing Systems using Today’s technologies, including spatial dataflows, maximum data utilization, and hardware specialization, and 2) Unconventional AI Computing Systems using Tomorrow’s technologies, like in-memory computing, emerging devices, and unconventional AI Computing Paradigms. 

Digital VLSI, Domain-Specific Computer Architecture, AI/ML, Hardware Acceleration, Digital ASIC Design, Dataflow Architectures & Systolic Arrays, In-Memory Computing, Stochastic Computing, Memory Design, Analogue Content-Addressable Memories, Convolutional Neural Networks CNNs, Large Language Models LLMs.

In 2021, I joined the Centre for Electronics Frontiers (CEF) at the University of Edinburgh (UK) as a Research Fellow (previously at the University of Southampton). I work on bridging the gap between emerging technologies and the ever-increasing performance demands of AI models, especially Convolutional Neural Networks (CNNs) and Large Language Models (LLMs). Since I joined CEF, I have been leading three research projects and have had 17 publications (Aug. 2025) (including 4 IEEE TCAS-I, 1 IEEE-TCASAI, 1 IEEE OJCAS, 1 Frontiers Nanoelectronics, 5 IEEE ISCAS, and 2 IEEE NEWCAS). I also filed 5 patents and contributed significantly to 6 AI Chips. Moreover, I am a Researcher Co-PI of a successful grant “Prosensing” with a budget of 1.45 million GBP (UKRI EPSRC NSS).